TS2007FC datasheet(24/33 Pages) STMICROELECTRONICS

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Application information

TS2007FC

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DocID14937 Rev 4

Application information

4.1

Differential configuration principle

The TS2007FC is a monolithic, fully-differential input/output, class-D power amplifier. It

includes a common mode feedback loop that controls the output bias value to average it at

VCC/2 in the range of DC common mode input voltage. This allows the device to always

have a maximum output voltage swing, and consequently, maximizes the output power. In

addition, as the load is connected differentially compared to a single-ended topology, the

output is four times higher for the same power supply voltage.

A fully-differential amplifier has the following advantages:

•

High PSRR (power supply rejection ratio)

•

High CMRR (common mode noise rejection

•

Virtually zero pop without additional circuitry, giving a faster startup time than

conventional single-ended input amplifiers

•

Easy interfacing with a differential output audio DAC

•

No input coupling capacitors required since there is a common mode feedback loop

4.2

Gain settings

In the flat region of the frequency-response curve (no input coupling capacitor or internal

feedback loop + load effect), the differential gain can be set to either 6 or 12 dB depending

on the logic level of the GS pin.

Note:

Between the GS pin and VCC there is an internal 300 kΩ resistor. When the pin is floating

the gain is 6 dB. In standby mode, this internal resistor is disconnected (HiZ input).

4.3

Common mode feedback loop limitations

The common mode feedback loop allows the output DC bias voltage to be averaged at

VCC/2 for any DC common mode bias input voltage.

Due to the Vicm limitation of the input stage (see Table 2: Operating conditions), the common

mode feedback loop can fulfill its role only within the defined range.

Table 11. GS pin gains

GS pin

Gain (dB)

Gain (V/V)

16 dB

012 dB

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