L9678PTR datasheet(37/215 Pages) STMICROELECTRONICS

37 / 215 page

DS11626 Rev 9

37/216

L9678P, L9678P-S

Start-up power control

214

Figure 17. VSF control logic

4.4

Oscillators

The device integrates two trimmed oscillators, both of them with spread spectrum capability

selectable via the CLK_CONF register.

The main oscillator runs at 16 MHz typ and is used to provide clock to the internal

synchronous logic. Moreover, this frequency is divided down by factor 8.5 to generate

clocks for the switching regulators (1.882 MHz typ).

The auxiliary oscillator runs at 7.5 MHz typ and is used to monitor the main oscillator. In

case the main oscillator frequency was lower than fOSC_LOW_TH threshold, the condition is

detected by the frequency monitor circuit and latched into the CLKFRERR flag in the FLTSR

fault flag once out of POR.

4.5

Reset functions

The device provides reset logic to safely control system operation in the event of internal

ECU failures. Several internal reset signals are generated depending on the type of failure

detected. In the following figure, the voltage monitoring diagram is shown. BG_ERR reports

errors on the bandgap reference voltage, VREG_ERR reports errors on any of the internal

regulators (VINT3V3 for 3.3 V analog circuitry, CVDD for 3.3 V digital circuitry),

VDD3V3_ERR and VDD5_ERR report errors on VDD3V3 and VDD5 regulators,

respectively.

GAPGPS01121

ARM1INT

ARM2INT

FENH

FENL

VSF_EN

SAFING STATE

DIAG STATE

DSTEST (VSF)

ARMING STATE

SAFESEL

ARM_EN

L9678PTR Datenblatt(PDF) 37 Page - STMicroelectronics