VNH5050ATR-E datasheet(21/33 Pages) STMICROELECTRONICS

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VNH5050A-E

Application information

Doc ID 16009 Rev 11

21/33

Application information

In normal operating conditions the DIAGX/ENX pin is considered as an input pin by the

device. This pin must be externally pulled high.

PWM pin usage: In all cases, a “0” on the PWM pin turns off both LSA and LSB switches.

When PWM rises back to “1”, LSA or LSB turn on again depending on the input pin state.

Figure 11.

Typical application circuit for DC to 20 kHz PWM operation short circuit

protection

Note:

The value of the blocking capacitor (C) depends on the application conditions and defines

voltage and current ripple on supply line at PWM operation. Stored energy of the motor

inductance may fly back into the blocking capacitor, if the bridge driver goes into 3-state.

This causes a hazardous overvoltage if the capacitor is not big enough. As basic orientation,

500µF per 10A load current is recommended.

In case of a fault condition the DIAGX/ENX pin is considered as an output pin by the device.

The fault conditions are:

–

Overtemperature on one or both high-sides

–

Short to battery condition on the output (over current detection on the low-side

Power MOSFET)

Possible origins of fault conditions may be:

OUTA is shorted to ground → overtemperature detection on high-side A

OUTA is shorted to VCC

→ low-side Power MOSFET over current detection

When a fault condition is detected, the user can identify which power element is in fault by

monitoring the INA, INB, DIAGA/ENA and DIAGB/ENB pins.

μC

Reg 5V

+ 5V

HSA

HSB

LSA

LSB

VCC

DIAGA/ENA

INA

PWM

OUTA

OUTB

b) N MOSFET

3.3K

10K

33nF

1.5K

VCC

100K

DIAGB/ENB

+5V

3.3K

INB

GNDA

GNDB

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