TLC080 datasheet(11/33 Pages) TI2

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OPA725, OPA2725

OPA726, OPA2726

SBOS278B − SEPTEMBER 2003 − REVISED JANUARY 2004

www.ti.com

APPLICATIONS INFORMATION

OPA725 and OPA726 series 20MHz CMOS op amps have

a fast slew rate, low noise, and excellent PSRR, CMRR,

and AOL. These op amps can operate on typically 4.3mA

quiescent current from a single (or split) supply in the range

of 4V to 12V (

±2V to ±6V), making them highly versatile

and easy to use. They are stable in a unity-gain

configuration.

Power-supply pins should be bypassed with 1nF ceramic

capacitors in parallel with 1

µF tantalum capacitors.

OPERATING VOLTAGE

OPA725 series op amps are specified from 4V to 12V

supplies over a temperature range of −40

°C to +125°C.

They will operate well in

±5V or +5V to +12V power-supply

systems. Parameters that vary significantly with operating

voltage or temperature are shown in the Typical

Characteristics.

ENABLE/SHUTDOWN

OPA725 series op amps require approximately 4.3mA

quiescent current. The enable/shutdown feature of the

OPA726 allows the op amp to be shut off to reduce this

current to approximately 6

µA.

The enable/shutdown input is referenced to the Enable

Reference Pin, DGND (see Pin Configurations). This pin

can be connected to logic ground in dual-supply op amp

configurations to avoid level-shifting the enable logic

signal, as shown in Figure 1.

The Enable Reference Pin voltage, VDGND, must not

exceed (V+) − 2V. It may be set as low as V−. The amplifier

is enabled when the Enable Pin voltage is greater than

VDGND + 2V. The amplifier is disabled (shutdown) if the

Enable Pin voltage is less than VDGND + 0.8V. The Enable

Pin is connected to internal pull-up circuitry and will enable

the device if left unconnected.

COMMON-MODE VOLTAGE RANGE

The input common-mode voltage range of the OPA725

and OPA726 series extends from V− to (V+) − 2V.

Common-mode rejection is excellent throughout the input

voltage range from V− to (V+) − 3V. CMRR decreases

somewhat as the common-mode voltage extends to

(V+) − 2V, but remains very good and is tested throughout

this range. See the Electrical Characteristics table for

details.

DGND

Digital

Logic

Enable

OPA726

+12V

a) Single−Supply Configuration

b) Dual−Supply Configuration

DGND

Digital

Logic

Enable

OPA726

+5V

−5V

OUT

Figure 1. Enable Reference Pin Connection for

Single- and Dual-Supply Configurations

INPUT OVER-VOLTAGE PROTECTION

Device inputs are protected by ESD diodes that will

conduct if the input voltages exceed the power supplies by

more than approximately 300mV. Momentary voltages

greater than 300mV beyond the power supply can be

tolerated if the current is limited to 10mA. This is easily

accomplished with an input resistor in series with the op

amp, as shown in Figure 2. The OPA725 series features

no phase inversion when the inputs extend beyond

supplies, if the input is current limited.

OPA725

V+

−

OUT

10mA max

OVERLOAD

Figure 2. Input Current Protection for Voltages

Exceeding the Supply Voltage

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