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SN54HC21 Datenblatt(PDF) 9 Page - Texas Instruments

Teilenummer SN54HC21
Bauteilbeschribung  SNx4HC21 Dual 4-Input AND Gates
PDF  34 Pages
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Hersteller  TI2 [Texas Instruments]
Direct Link  https://www.ti.com
Logo TI2 - Texas Instruments

SN54HC21 Datenblatt(HTML) 9 Page - Texas Instruments

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8 Detailed Description
8.1 Overview
This device contains two independent 4-input AND gates. Each gate performs the Boolean function Y = A ● B
● C ● D in positive logic.
8.2 Functional Block Diagram
xA
xB
xY
xC
xD
8.3 Feature Description
8.3.1 Balanced CMOS Push-Pull Outputs
A balanced output allows the device to sink and source similar currents. The drive capability of this device
may create fast edges into light loads so routing and load conditions should be considered to prevent ringing.
Additionally, the outputs of this device are capable of driving larger currents than the device can sustain without
being damaged. It is important for the output power of the device to be limited to avoid damage due to
over-current. The electrical and thermal limits defined in the Section 6.1 must be followed at all times.
The SN74HC21 can drive a load with a total capacitance less than or equal to the maximum load listed in the
Section 6.6 connected to a high-impedance CMOS input while still meeting all of the datasheet specifications.
Larger capacitive loads can be applied, however it is not recommended to exceed the provided load value. If
larger capacitive loads are required, it is recommended to add a series resistor between the output and the
capacitor to limit output current to the values given in the Section 6.1.
8.3.2 Standard CMOS Inputs
Standard CMOS inputs are high impedance and are typically modeled as a resistor from the input to ground
in parallel with the input capacitance given in the Section 6.4. The worst case resistance is calculated with the
maximum input voltage, given in the Section 6.1, and the maximum input leakage current, given in the Section
6.4, using ohm's law (R = V ÷ I).
Signals applied to the inputs need to have fast edge rates, as defined by the input transition time in the Section
6.2 to avoid excessive current consumption and oscillations. If a slow or noisy input signal is required, a device
with a Schmitt-trigger input should be used to condition the input signal prior to the standard CMOS input.
www.ti.com
SN74HC21, SN54HC21
SCLS087F – DECEMBER 1982 – REVISED JUNE 2021
Copyright © 2021 Texas Instruments Incorporated
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Product Folder Links: SN74HC21 SN54HC21



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