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TLV62065

www.ti.com

SLVSAC4B – NOVEMBER 2010 – REVISED DECEMBER 2015

8.2.2.2.2

Output Capacitor Selection

The advanced fast-response voltage mode control scheme of the TLV62065 allows the use of tiny ceramic

capacitors. Ceramic capacitors with low ESR values have the lowest output voltage ripple and are

recommended. The output capacitor requires either an X7R or X5R dielectric. Y5V and Z5U dielectric capacitors,

aside from their wide variation in capacitance over temperature, become resistive at high frequencies and may

not be used. For most applications a nominal 10-µF or 22-µF capacitor is suitable. At small ceramic capacitors,

the DC-bias effect decreases the effective capacitance. Therefore a 22-µF capacitor can be used for output

voltages higher than 2 V, see list of capacitors.

In case additional ceramic capacitors in the supplied system are connected to the output of the DC–DC

converter, the output capacitor COUT need to be decreased in order not to exceed the recommended effective

capacitance range. In this case a loop stability analysis must be performed as described later.

At nominal load current, the device operates in PWM mode and the RMS ripple current is calculated by

Equation 7:

(7)

8.2.2.2.3

Input Capacitor Selection

Because of the nature of the buck converter having a pulsating input current, a low ESR input capacitor is

required for best input voltage filtering and minimizing the interference with other circuits caused by high input

voltage spikes. For most applications a 10-µF ceramic capacitor is recommended. The input capacitor can be

increased without any limit for better input voltage filtering.

Take care when using only small ceramic input capacitors. When a ceramic capacitor is used at the input and the

power is being supplied through long wires, such as from a wall adapter, a load step at the output or VIN step on

the input can induce ringing at the VIN pin. This ringing can couple to the output and be mistaken as loop

instability or could even damage the part by exceeding the maximum ratings.

Table 2. List of Capacitors

CAPACITANCE

TYPE

SIZE [ mm3]

SUPPLIER

10

μF

GRM188R60J106M

0603: 1.6 x 0.8 x 0.8

Murata

22

μF

GRM188R60G226M

0603: 1.6 x 0.8 x 0.8

Murata

22 µF

CL10A226MQ8NRNC

0603: 1.6 x 0.8 x 0.8

Samsung

10 µF

CL10A106MQ8NRNC

0603: 1.6 x 0.8 x 0.8

Samsung

8.2.2.3 Checking Loop Stability

The first step of circuit and stability evaluation is to look from a steady-state perspective at the following signal:

•

Switching node, SW

•

Inductor current, IL

•

Output ripple voltage, VOUT(AC)

These are the basic signals that need to be measured when evaluating a switching converter. When the

switching waveform shows large duty cycle jitter or the output voltage or inductor current shows oscillations, the

regulation loop may be unstable. This is often a result of board layout and/or wrong L-C output filter

combinations. As a next step in the evaluation of the regulation loop, the load transient response is tested. The

time between the application of the load transient and the turn on of the P-channel MOSFET, the output

capacitor must supply all of the current required by the load. VOUT immediately shifts by an amount equal to

ΔI(LOAD) x ESR, where ESR is the effective series resistance of COUT. ΔI(LOAD) begins to charge or discharge COUT

generating a feedback error signal used by the regulator to return VOUT to its steady-state value. The results are

most easily interpreted when the device operates in PWM mode at medium to high load currents.

During this recovery time, VOUT can be monitored for settling time, overshoot, or ringing; that helps evaluate

stability of the converter. Without any ringing, the loop has usually more than 45° of phase margin.

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