TMP112 datasheet(21/46 Pages) TI2

21 / 46 page

Frame 1 Two-Wire Target Address Byte

Frame 2 Pointer Register Byte

Frame 4 Data Byte 2

Start By

Controller

ACK By

Device

ACK By

Device

ACK By

Device

Stop By

Controller

Frame 3 Data Byte 1

ACK By

Device

SDA

(Continued)

SCL

(Continued)

SDA

SCL

(1)

R/W

The values of A0 and A1 are determined by the ADD0 pin.

Figure 7-4. Two-Wire Timing Diagram for Write Word Format

Frame 1 Two-Wire Target Address Byte

Frame 2 Pointer Register Byte

Start By

Controller

ACK By

Device

ACK By

Device

Frame 3 Two-Wire Target Address Byte

Frame 4 Data Byte 1 Read Register

Start By

Controller

ACK By

Device

ACK by

Controller

(2)

From

Device

SDA

SCL

R/W

SDA

(Continued)

SCL

(Continued)

SDA

(Continued)

SCL

(Continued)

(1)

R/W

Frame 5 Data Byte 2 Read Register

Stop by

Controller

ACK by

Controller

(3)

From

Device

Stop By

Controller

The values of A0 and A1 are determined by the ADD0 pin.

The controller must leave the SDA pin high to terminate a single-byte read operation.

The controller must leave the SDA pin high to terminate a two-byte read operation.

Figure 7-5. Two-Wire Timing Diagram for Read Word Format

www.ti.com

TMP112-Q1, TMP112D-Q1

SLOS887G – SEPTEMBER 2014 – REVISED MAY 2025

Submit Document Feedback

Product Folder Links: TMP112-Q1 TMP112D-Q1

TMP112 Datenblatt(PDF) 21 Page - Texas Instruments

TMP112 Datenblatt(HTML) 21 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46

Datenblatt Download

Link URL