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L6995D Datenblatt(PDF) 18 Page - STMicroelectronics |
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L6995D Datenblatt(HTML) 18 Page - STMicroelectronics |
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18 / 25 page ![]() L6995 18/25 R10 = 1K Ω R9 = 390 Ω The device output voltage is adjustable by connecting a voltage divider from output to VSENSE pin. Minimum output voltage is VOUT = VREF = 0.9V. Once output divider and frequency divider have been designed as to ob- tain the required output voltage and switching frequency, the following equation gives the smallest input voltage, which allows L6995 to regulate (which corresponds to TOFF = TOFF, MIN): Eq 25 where the KOSC/TOFFMIN ratio worst-case is given in electrical characteristic table (pag. 4). 3.6 Voltage Feed Forward Choosing the switching frequency around 270KHz from the Eq1. It can be selected the input divider. For exam- ple: R3=560K Ω R4=28K Ω In order to compensate the comparator delay R4 resistor should be increased around 20%. R4=33K Ω 3.7 Current limit resistor From the Eq13 can be set the valley current limit, knowing the low side RDSON. To set the exact current limit it must be considered the temperature effect. So two STS25NH3LL have 2.75m Ω @ 25°C, at 100°C can be con- sidered 3.85m Ω. R8 = 47K Ω 3.8 Integrator capacitor Let it be FU = 15kHz. Since VREF = 0.9V, from Eq4, it follows αOUT = 0.72 and, from Eq5 it follows CINT1 = 330pF. Because the ripple is lower than 150mV the system doesn't need the second integrator capacitor. 3.9 Soft start capacitor Considering the soft start equations can be found: CSS = 200pF These equations are valid whitout load. When an active load is present the equantions result more complex; further some active loads have unexpected effect, as higher current than the expected one during the start up, that can change the start up time. In this case the capacitor value can be selected on the application; anyway the Eq11 gives an idea about the CSS value. δ 1 α OSC α OUT -------------- 1 K OS C T OF FM IN ------------------------ ------------------------------ ⋅ – < |
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