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MFRC531 Datenblatt(PDF) 7 Page - NXP Semiconductors

Teilenummer MFRC531
Bauteilbeschribung  Short Form Specification
PDF  13 Pages
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Hersteller  PHILIPS [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

MFRC531 Datenblatt(HTML) 7 Page - NXP Semiconductors

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Philips Semiconductors
Short From Specification Rev. 2.0 February 2002
ISO 14443 Reader IC
MF RC531
7
PUBLIC
3.2.5 RESET PIN
The reset pin disables internal current sources and clocks and detaches the MF RC531 virtually from the µC
bus. If RST is released, the MF RC531 executes the power up sequence.
3.2.6 OSCILLATOR
Name
Type
Function
XIN
I
Oscillator Buffer Input
XOUT
O
Oscillator Buffer Output
The very fast on-chip oscillator buffer operates with a 13.56 MHz crystal connected to XIN and XOUT. If the
device shall operate with an external clock it may be applied to pin XIN.
3.2.7
MIFARE
® INTERFACE
The MF RC531 supports the active antenna concept of MIFARE
®. It may handles the base-band signals
NPAUSE and KOMP of MIFARE
® Core Modules (MF CMxxx) at the pins MFIN and MFOUT.
Name
Type
Function
MFIN
I with Schmitt Trigger
MIFARE
® Interface Input
MFOUT
O
MIFARE
® Interface Output
The MIFARE
® interface may be used to communicate with either the analog or the digital part of the MF
RC531 separately in the following ways:
The analog circuit may be used stand-alone via the MIFARE
® interface. In that case MFIN will be
connected to the externally generated NPAUSE signal. The MFOUT pin provides the KOMP signal.
The digital circuit may be used to drive an external analog circuit via the MIFARE
® interface. In that case
the MFOUT pin provides the internally generated NPAUSE signal and MFIN will be connected to the
KOMP signal from the outside.
3.2.8 PARALLEL INTERFACE
16 pins control the parallel interface:
Name
Type
Function
D0
… D7
I/O with Schmitt Trigger
Bi-directional Data Bus
A0 … A2
I/O with Schmitt Trigger
Address Lines
NWR / RNW
I/O with Schmitt Trigger
Not Write / Read Not Write
NRD / NDS
I/O with Schmitt Trigger
Not Read / Not Data Strobe
NCS
I/O with Schmitt Trigger
Not Chip Select
ALE
I/O with Schmitt Trigger
Address Latch Enable
IRQ
O
Interrupt Request



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