STA328 datasheet(27/57 Pages) STMICROELECTRONICS

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STA328

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6.4

Configuration register D (addr 0x03)

The STA328 features an internal digital high-pass filter for the purpose of DC Blocking. The

purpose of this filter is to prevent DC signals from passing through a DDX® amplifier. DC

signals can cause speaker damage.

By setting this bit to 1, the de-emphasis will be implemented on all channels. DSPB (DSP

Bypass, Bit D2, CFA) bit must be set to 0 for de-emphasis to function.

Setting the DSPB bit bypasses all the EQ and mixing functionality of the STA328 core.

Post-scale functionality is an attenuation placed after the volume control and directly before

the conversion to PWM. Post-scale can also be used to limit the maximum modulation index

and therefore the peak current. A setting of 1 in the PSL register will result in the use of the

value stored in channel 1 post-scale for all three internal channels.

MME

ZDE

DRC

BQL

PSL

DSPB

DEMP

HPB

Table 25.

High-pass filter bypass

Bit

R/W

RST

Name

Description

0RW

HPB

High-pass filter bypass bit.

0: AC coupling high pass filter enabled

1: AC coupling high pass filter disabled

Table 26.

De-emphasis

Bit

R/W

RST

Name

Description

1RW

DEMP

De-emphasis:

0: no de-emphasis

1: de-emphasis

Table 27.

DSP bypass

Bit

R/W

RST

Name

Description

DSPB

DSP bypass bit:

0: normal Operation

1: bypass of EQ and mixing functionality

Table 28.

Post-scale link

Bit

R/W

RST

Name

Description

PSL

Post-scale link:

0: each channel uses individual post-scale value

1: each channel uses channel 1 post-scale value

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