TMS320DM647 datasheet(100/182 Pages) TI

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6.9.3.5 DDR2 Keep Out Region

DDR2Device

TMS320DM647/TMS320DM648

Digital Media Processor

SPRS372B – MAY 2007 – REVISED APRIL 2008

www.ti.com

Table 6-31. Placement Specifications

NO.

PARAMETER

MIN

MAX

UNIT

X(1)(2)

1660

Mils

Y(1)(2)

1280

Mils

Y Offset(1)(2)(3)

650

Mils

DDR2 Keepout Region(4)

Clearance from non-DDR2 signal to DDR2 Keepout Region(5)

(1)

See Figure 6-12 for dimension defintions.

(2)

Measurements from center of DSP device to center of DDR2 device.

(3)

For 16-bit memory systems, it is recommended that Y Offset be as small as possible.

(4)

DDR2 Keepout region to encompass entire DDR2 routing area

(5)

Non-DDR2 signals allowed within DDR2 keepout region provided they are separated from DDR2 routing layers by a ground plane.

The region of the PCB used for the DDR2 circuitry must be isolated from other signals. The DDR2 keep

out region is defined for this purpose and is shown in Figure 6-15. The size of this region varies with the

placement and DDR routing. Additional clearances required for the keep out region are shown in

Table 6-31.

Figure 6-15. DDR2 Keepout Region

NOTE

The region (see Figure 6-15) should encompass all DDR2 circuitry and varies depending

on placement. Non-DDR2 signals should not be routed on the DDR signal layers within

the DDR2 keep out region. Non-DDR2 signals may be routed in the region provided they

are routed on layers separated from DDR2 signal layers by a ground layer. No breaks

should be allowed in the reference ground layers in this region. In addition, the 1.8-V

power plane should cover the entire keep out region.

Peripheral Information and Electrical Specifications

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