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RA4M3 Datenblatt(PDF) 45 Page - Renesas Technology Corp |
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RA4M3 Datenblatt(HTML) 45 Page - Renesas Technology Corp |
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45 / 98 page ![]() When not switching the source clock: tPcyc × 2 < tACYC should be satisfied. When switching the source clock: tPcyc × 6 < tACYC should be satisfied. Port tPRW Figure 2.19 I/O ports input timing POEG input trigger tPOEW Figure 2.20 POEG input trigger timing Input capture tGTICW Figure 2.21 GPT input capture timing GPT output PCLKD tGTISK Output delay Figure 2.22 GPT output delay skew RA4M3 Datasheet 2. Electrical Characteristics R01DS0368EJ0150 Rev.1.50 Apr 25, 2025 Page 45 of 98 |
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