GD32F310 datasheet(58/81 Pages) GIGADEVICE

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GD32F310xx Datasheet

Table 4-28. ADC RAIN max for fADC = 36 MHz(1)

Ts(cycles)

ts(

μs)

RAINmax

(kΩ)

1.5

0.04

0.8

7.5

0.20

5.1

13.5

0.37

9.4

28.5

0.79

20.1

41.5

1.15

29.4

55.5

1.54

39.5

71.5

1.98

50.9

239.5

6.65

171

(1)

Based on characterization, not tested in production.

Table 4-29. ADC dynamic accuracy at fADC = 14 MHz(1)

Symbol

Parameter

Test conditions

Min Typ

Max

Unit

ENOB

Effective number of bits

fADC = 14 MHz

VDDA = VDD = 3.3 V

Input Frequency = 20 kHz

Temperature = 25

℃

—

10.9

—

bits

SNDR

Signal-to-noise and distortion ratio

—

67.3

—

SNR

Signal-to-noise ratio

—

67.6

—

THD

Total harmonic distortion

—

-79

—

(1)

Based on characterization, not tested in production.

Table 4-30. ADC dynamic accuracy at fADC = 28 MHz(1)

Symbol

Parameter

Test conditions

Min

Typ

Max Unit

ENOB

Effective number of bits

fADC = 28 MHz

VDDA = VDD = 3.3 V

Input Frequency = 20 kHz

Temperature = 25

℃

—

10.8

—

bits

SNDR

Signal-to-noise and distortion ratio

—

66.7

—

SNR

Signal-to-noise ratio

—

67.0

—

THD

Total harmonic distortion

—

-78

—

(1)

Based on characterization, not tested in production.

Table 4-31.ADC dynamic accuracy at fADC = 36 MHz(1)

Symbol

Parameter

Test conditions

Min

Typ

Max Unit

ENOB

Effective number of bits

fADC = 36 MHz

VDDA = VDD = 3.3 V

Input Frequency = 20

kHz

Temperature = 25

℃

—

10.8

—

bits

SNDR

Signal-to-noise and distortion ratio

—

66.7

—

SNR

Signal-to-noise ratio

—

67.0

—

THD

Total harmonic distortion

—

-78

—

(1)

Based on characterization, not tested in production.

Table 4-32. ADC static accuracy at fADC = 14 MHz(1)

Symbol

Parameter

Test conditions

Typ

Max Unit

Offset

Offset error

fADC = 14 MHz

VDDA = VDD = 3.3 V

±1

—

LSB

DNL

Differential linearity error

±1

—

INL

Integral linearity error

±1.5

—

(1)

Based on characterization, not tested in production.

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