AD8341_V01 datasheet(16/20 Pages) AD

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AD8341

Data Sheet

Rev. B | Page 16 of 20

Figure 39 shows how ACPR and noise vary with varying input

power (differential I and Q control voltages are held at 0.353 V).

At high power levels, both adjacent and alternate channel power

ratios increase sharply. As output power drops, adjacent and

alternate channel power ratios both reach minimums before the

measurement becomes dominated by the noise floor of the

AD8341. At this point, adjacent and alternate channel power

ratios become approximately equal.

As the output power drops, the noise floor, measured in dBm in

1 MHz BW at 50 MHz carrier offset, drops slightly.

–30

–80

–75

–70

–65

–60

–55

–50

–45

–40

–35

–30

–25

–20

–15

–10

–5

OUTPUT POWER (dBm)

–50

–55

–60

–65

–70

–75

–80

–85

–90

–95

–100

ACPR 5MHz OFFSET

ACPR 10MHz OFFSET

NOISE –50MHz OFFSET

Figure 39. AD8341 ACPR and Noise vs. Output Power;

Single-Carrier WCDMA (Test Model 1-64 at 2140 MHz)

Figure 40 shows how output power, ACPR, and noise vary with

the differential I and Q control voltages. VBBI and VBBQ are tied

together and are varied from 0.5 V to 50 mV.

–50

–45

–40

–35

–30

–25

–20

–15

–10

–5

0.1

0.2

0.3

0.4

0.5

IQ CONTROL VOLTAGE

–40

–45

–50

–55

–60

–65

–70

–75

–80

–85

–90

OUTPUT POWER dBm

ACPR 10MHz OFFSET

NOISE –50MHz OFFSET

ACPR 5MHz OFFSET

Figure 40. AD8341 Output Power, ACPR and Noise vs. VIQ.

Single-Carrier WCDMA (Test Model 1-64 at 2140 MHz)

In this case, adjacent channel power ratio remains constant as

the (noise dominated) alternate channel power degrades

roughly 1-for-1 with output power. As the I and Q control

voltage drops, the noise floor again drops slowly.

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