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SS1621
p. 13
Last update: 2008-06-03 04:36
Application Circuits
Host controller with a SS1621 display system
Note: The connection of IRQ and RD pin can be selected depending on the requirement of the μC.
The voltage applied to V
LCD pin must be lower than VDD.
Adjust VR to fit LCD display, at V
DD=5V, VLCD=4V, VR=15kΩ+20%
Adjust R (external pull-high resistance) to fit user’s time base clock.
DATA
OSCI
OSCO
COM0 COM3
~
SEG0 SEG31
~
VLCD
VDD
BZ
1/2 or 1/3 Bias; 1/2, 1/3 or 1/4 Duty
LCD PANEL
μC
SS1621
Clock Out
External Clock 1
External Clock 2
On-chip OSC
Crystal
32768Hz
R
*
*
VR
*
Piezo
BZ
IRQ
WR
RD
CS