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ST20C4 Datenblatt(PDF) 53 Page - STMicroelectronics |
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ST20C4 Datenblatt(HTML) 53 Page - STMicroelectronics |
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53 / 212 page ![]() clockdis 53/212 ® clockdis clock disable Code: 64 FE Description: Stops the clocks specified in bits 0 and 1 of Areg where bit 0 indicates the high priority clock and bit 1 the low priority clock. The original values of these two clock enable bits are returned in Areg. Definition: Areg ′ 1..0 ← ClockEnables Areg ′ 31..2 ← 0 ClockEnables ′← ClockEnables ∧ ∼Areg Error signals: none Comments: Secondary instruction. See also: clockenb |
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