ST92F120JR9T datasheet(31/320 Pages) STMICROELECTRONICS

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ST92F120 - DEVICE ARCHITECTURE

SYSTEM REGISTERS (Cont’d)

POINTER 0 REGISTER (RP0)

R232 - Read/Write

Reset Value: xxxx xx00 (xxh)

Bit 7:3 = RG[4:0]:

These bits contain the number (in the range 0 to

31) of the register block specified in the srp0 or

srp

instructions. In single 16-register mode the

number indicates the lower of the two 8-register

blocks to which the 16 working registers are to be

mapped, while in twin 8-register mode it indicates

the 8-register block to which r0 to r7 are to be

mapped.

Bit 2 = RPS:

This bit is set by the instructions srp0 and srp1 to

indicate that the twin register pointing mode is se-

lected. The bit is reset by the srp instruction to in-

dicate that the single register pointing mode is se-

lected.

0: Single register pointing mode

1: Twin register pointing mode

Bit 1:0: Reserved. Forced by hardware to zero.

POINTER 1 REGISTER (RP1)

R233 - Read/Write

Reset Value: xxxx xx00 (xxh)

This register is only used in the twin register point-

ing mode. When using the single register pointing

mode, or when using only one of the twin register

groups, the RP1 register must be considered as

RESERVED and may NOT be used as a general

purpose register.

Bit 7:3 = RG[4:0]:

bits contain the number (in the range 0 to 31) of

the 8-register block specified in the srp1 instruc-

tion, to which r8 to r15 are to be mapped.

Bit 2 = RPS:

This bit is set by the srp0 and srp1 instructions to

indicate that the twin register pointing mode is se-

lected. The bit is reset by the srp instruction to in-

dicate that the single register pointing mode is se-

lected.

0: Single register pointing mode

1: Twin register pointing mode

Bit 1:0: Reserved. Forced by hardware to zero.

RG4

RG3

RG2

RG1

RG0

RPS

RG4

RG3

RG2

RG1

RG0

RPS

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