V53C8129H40 datasheet(1/18 Pages) MOSEL

Teilenummer	V53C8129H40

Bauteilbeschribung	ULTRA-HIGH PERFORMANCE, 128K X 8EDO PAGE MODE CMOS DYNAMIC RAM

PDF	18 Pages

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Hersteller	MOSEL [Mosel Vitelic, Corp]

Direct Link	http://www.moselvitelic.com

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MOSEL VITELIC

1

V53C8129H

ULTRA-HIGH PERFORMANCE,

128K X 8 EDO PAGE MODE

CMOS DYNAMIC RAM

PRELIMINARY

V53C8129H Rev. 1.3 July 1997

HIGH PERFORMANCE

35

40

45

50

Max. RAS Access Time, (t

RAC)

35 ns

40 ns

45 ns

50 ns

Max. Column Address Access Time, (t

CAA)

18 ns

20 ns

22 ns

24 ns

Min. Fast Page Mode With EDO Cycle Time, (t

PC)

14 ns

15 ns

17 ns

19 ns

Min. Read/Write Cycle Time, (t

RC)

70 ns

75 ns

80 ns

90 ns

Features

s 128K x 8-bit organization

s RAS access time: 35, 40, 45, 50 ns

s EDO Page Mode supports sustained I/O data

rates up to 71.5 MHz

s Low power dissipation

• V53C8129H-50

— Operating Current: 135 mA max

— TTL Standby Current: 2.0 mA max

s Low CMOS Standby Current: 1.0 mA max

s Read-Modify-Write, RAS-Only Refresh,

CAS-Before-RAS Refresh capability

s Refresh Interval: 512 cycles/8 ms

s Available in 26/24 pin 300 mil SOJ package

Description

The V53C8129H is a high speed 131,072 x 8 bit

CMOS dynamic random access memory. The

V53C8129H offers a combination of features: EDO

Page Mode for high data bandwidth, fast usable

speed, CMOS standby current.

All inputs and outputs are TTL compatible. Input

and output capacitances are significantly lowered to

allow increased system performance. Page Mode

with extended data out operation allows random ac-

cess of up to 256 columns (x8) bits within a row with

cycle times as short as 14 ns. Because of static cir-

cuitry, the CAS clock is not in the critical timing path.

The flow-through column address latches allow ad-

dress pipelining while relaxing many critical system

timing requirements for fast usable speed. These

features make the V53C8129H ideally suited for

graphics, digital signal processing and high perfor-

mance peripherals.

Device Usage Chart

Operating

Temperature

Range

Package Outline

Access Time (ns)

Power

Temperature

Mark

K

35

40

45

50

Std.

0

°C to 70 °C

•

Blank

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