AD7264BSTZ datasheet(5/32 Pages) AD

Teilenummer	AD7264BSTZ

Bauteilbeschribung	1 MSPS, 14-Bit, Simultaneous Sampling SAR ADC with PGA and Four Comparators

PDF	32 Pages

Scroll/Zoom	100%

Hersteller	AD [Analog Devices]

Direct Link	http://www.analog.com

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5 / 32 page

AD7264

Rev. A | Page 5 of 32

Parameter

Min

Typ

Max

Unit

Test Conditions/Comments

POWER REQUIREMENTS

Digital inputs = 0 V or VDRIVE

AVCC

4.75

5.25

CA_CBVCC, CC_CDVCC

2.7

5.25

VDRIVE

2.7

5.25

IDD

ADC Normal Mode (Static)

31.5

AVCC = 5.25 V

ADC Normal Mode (Dynamic)

33.3

fS = 1 MSPS, AVCC = 5.25 V

Shutdown Mode

0.5

μA

AVCC = 5.25 V, ADCs and comparators

powered down

Power Dissipation

ADC Normal Mode (Static)

105

165

ADC Normal Mode (Dynamic)

120

175

Shutdown Mode

2.625

5.25

μW

1 These specifications were determined without the use of the gain calibration feature.

2 See the Terminology section.

3 Samples are tested during initial release to ensure compliance; they are not subject to production testing.

4 For PGA gain = 1, to utilize the full analog input range (VCM ± VREF/2) of the AD7264, the VCM voltage should be dropped to lie within a range from 1.95 V to 2.05 V.

5 Refers to Pin VREFA or Pin VREFB.

6 This specification includes the IDD for both comparators. The IDD per comparator is the specified value divided by 2.

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