74LCX374

2/13

Figure 2: Input And Output Equivalent Circuit

Table 2: Pin Description

Table 3: Truth Table

X : Don’t Care

Z : High Impedance

Figure 3: Logic Diagram

This logic diagram has not be used to estimate propagation delays

PIN N°

SYMBOL

NAME AND FUNCTION

1OE

3 State Output Enable

Input (Active LOW)

2, 5, 6, 9, 12,

15, 16, 19

Q0 to Q7

3-State Outputs

3, 4, 7, 8, 13,

14, 17, 18

D0 to D7

Data Inputs

11

CK

Clock Input (LOW to HIGH,

edge triggered)

10

GND

Ground (0V)

20

Positive Supply Voltage

INPUT

OUTPUT

OE

CK

D

Q

HXX

Z

L

X

NO CHANGE

LL

L

LH

H