L4973 datasheet(4/27 Pages) STMICROELECTRONICS

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Pin settings

L4973

4/27

2.2

Pin description

Note:

The maximum power dissipation of the package must be observed.

Table 1. Pin description

N° Pin

Name

Description

DIP-18

SO-20

COMP

E/A output to be used for frequency compensation

INH

A logic signal (active high) disables the device (sleep

mode operation). If not used it must be connected to

GND; if floating the device is disabled.

BOOT

A capacitor connected between this pin and the output

allows to drive the internal D-MOS.

SYNC

Input/Output synchronization.

7,8

8,9

VCC

Unregulated DC input voltage

2,3

OUT

Stepdown regulator output.

VFB

Stepdown feedback input. Connecting the output

directly to this pin results in an output voltage of 3.3V for

the L4973V3.3 and 5.1V for L4973V5.1. An external

resistive divider is required for higher output voltages.

For output voltage resistive divider is required for higher

output voltages. For output voltage less than 3.3V, see

Note: 1 and Figure 33.

V5.1

Reference voltage externally available.

4,5,6

13,14,15

4,5,6,7

14,15,16,17

GND

Signal ground

OSC

An external resistor connected between the unregulated

input voltage and Pin 1 and a capacitor connected from

Pin 1 to ground fixes the switching frequency. (Line feed

forward is automatically obtained)

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