STDS75 datasheet(25/37 Pages) STMICROELECTRONICS

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STDS75

Functional description

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3.6

WRITE mode

In this mode the master transmitter transmits to the STDS75 slave receiver. Bus protocol is

shown in Figure 12. Following the START condition and slave address, a logic '0' (R/W = 0)

is placed on the bus and indicates to the addressed device that word address will follow and

is to be written to the on-chip address pointer.

These modes are shown in the WRITE mode typical timing diagrams (see Figure 12, and

Figure 13, and Figure 14 on page 26).

Figure 12.

Typical pointer set followed by an Immediate READ from the

configuration register

Figure 13.

Configuration register WRITE

AI12279b

Repeat

Start

Master

ACK

STDS75

No ACK

STDS75

Stop

Cond.

Master

A1 A0

D7 D6 D5 D4 D3 D2 D1 D0

R/W

Address Byte

Data Byte

Start

Master

Address Byte

Pointer Byte

ACK

STDS75

ACK

STDS75

A1 A0

D1 D0

AI12280b

Start

Master

Address Byte

Pointer Byte

ACK

STDS75

ACK

STDS75

ACK

STDS75

Stop

Cond.

Master

A1 A0

D4 D3 D2 D1 D0

D1 D0

Configuration Byte

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