Preliminary Technical Data

AD7190

Rev.PrD 7/08 | Page 21

PR07640-0-7/08(PrD)

Table 20. Register Bit Designations

Bit Location

Bit Name

Description

GP7

0

This bit must be programmed with a Logic 0 for correct operation.

GP 6

BPDSW

can sink up to 30 mA. Cleared by user to open the power switch. When the ADC is placed in power-

down mode, the power switch remains active.

GP5

GP32EN

Digital Outputs P3 and P2 Enable.

When GP32EN is set, the digital outputs P3 and P2 are active. When GP32EN is cleared, the pins P3

and P2 are tri-stated and bits P3DAT and P2DAT are ignored.

GP4

GP10EN

Digital Outputs P1 and P0 Enable.

When GP10EN is set, the digital outputs P1 and P0 are active. When GP10EN is cleared, the P1 and

P0 outputs are tri-stated and bits P1DAT and P0DAT are ignored. The pins P1 and P0 can be used as a

reference input REFIN2 when bit REFSEL in the configuration register is set to 1.

GP3

P3DAT

Digital Output P3. When GP32EN is set, the P3DAT bit sets the value of the general purpose output

pin P3. When P3DAT is high, the output P3 is high. When P3DAT is low, the output P3 is low.

GP2

P2DAT

Digital Output P2. When GP32EN is set, the P2DAT bit sets the value of the general purpose output

pin P2. When P2DAT is high, the output P2 is high. When P2DAT is low, the output P2 is low.

GP1

P1DAT

Digital Output P1. When GP10EN is set, the P1DAT bit sets the value of the general purpose output

pin P1. When P1DAT is high, the output P1 is high. When P1DAT is low, the output P1 is low.

GP0

P0DAT

Digital Output P0. When GP10EN is set, the P0DAT bit sets the value of the general purpose output

pin P0. When P0DAT is high, the output P0 is high. When P0DAT is low, the output P0 is low.

OFFSET REGISTER

(RS2, RS1, RS0 = 1, 1, 0; Power-On/Reset = 0x800000)

The offset register holds the offset calibration coefficient for the

ADC. The power-on reset value of the offset register is

0x800000. The AD7190 has four offset registers so each channel

has a dedicated offset register. Each of these registers is a 24-bit

read/write register. This register is used in conjunction with its

associated full-scale register to form a register pair. The power-

on reset value is automatically overwritten if an internal or

system zero-scale calibration is initiated by the user. The

AD7190 must be placed in power-down mode or idle mode

when writing to the offset register.

FULL-SCALE REGISTER

(RS2, RS1, RS0 = 1, 1, 1; Power-On/Reset = 0x5XXXX0)

The full-scale register is a 24-bit register that holds the full-scale

calibration coefficient for the ADC. The AD7190 has 4 full-

scale registers so each channel has a dedicated full-scale register.

The full-scale registers are read/write registers. However, when

writing to the full-scale registers, the ADC must be placed in

power-down mode or idle mode. These registers are configured

on power-on with factory-calibrated full-scale calibration

coefficients, the calibration being performed at gain = 1.

Therefore, every device will have different default coefficients.

The default value will be automatically overwritten if an

internal or system full-scale calibration is initiated by the user

or the full-scale register is written to.