Rev.2.00, Feb.18.2005, page 1 of 4

HD74LS125A

Quadruple Bus Buffer Gates (with three-state outputs)

REJ03D0430–0200

Rev.2.00

Feb.18.2005

Features

• Ordering Information

Part Name

Package Type

Package Code

(Previous Code)

Package

Abbreviation

Taping Abbreviation

(Quantity)

HD74LS125AP

DILP-14 pin

PRDP0014AB-B

(DP-14AV)

P

—

HD74LS125AFPEL

SOP-14 pin (JEITA)

PRSP0014DF-B

(FP-14DAV)

FP

EL (2,000 pcs/reel)

HD74LS125ARPEL

SOP-14 pin (JEDEC)

PRSP0014DE-A

(FP-14DNV)

RP

EL (2,500 pcs/reel)

Note:

Please consult the sales office for the above package availability.

Pin Arrangement

(Top view)

4C

4A

4Y

3A

3C

1C

GND

1A

1Y

2C

2A

2Y

3Y

1

2

3

4

5

6

7

14

8

9

10

11

12

13

Function Table

Inputs

Outputs

C

A

Y

H

X

Z

L

L

L

L

H

H

Note:

H ; high level,

L ; low level,

X ; irrelevant,

Z ; off (high-impedance) state of a 3-state output