Rev.3.00, Jul.22.2005, page 1 of 6

HD74LS42

BCD-to-Decimal Decoder

REJ03D0409–0300

Rev.3.00

Jul.22.2005

This monolithic decimal decoder consists of eight inverters and ten four-input NAND gates. The inverters are

connected in pairs to make BCD input data available for decoding by NAND gates. Full decoding of valid input logic

ensures that all outputs remain off for all invalid input conditions.

Features

• Ordering Information

Part Name

Package Type

Package Code

(Previous Code)

Package

Abbreviation

Taping Abbreviation

(Quantity)

HD74LS42P

DILP-16 pin

PRDP0016AE-B

(DP-16FV)

P

—

HD74LS42FPEL

SOP-16 pin (JEITA)

PRSP0016DH-B

(FP-16DAV)

FP

EL (2,000 pcs/reel)

HD74LS42RPEL

SOP-16 pin (JEDEC)

PRSP0016DG-A

(FP-16DNV)

RP

EL (2,500 pcs/reel)

Note:

Please consult the sales office for the above package availability.

Pin Arrangement

(Top view)

GND

0Y

1Y

2Y

3Y

4Y

5Y

6Y

A

B

D

C

9Y

8Y

7Y

15

16

1

2

3

4

5

6

7

14

8

9

10

11

12

13

1

2

6

5

4

3

9

0

8

7

A

B

C

D

Outputs

Outputs

Inputs