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HD74LS76AP Datenblatt(PDF) 2 Page - Renesas Technology Corp

Teilenummer HD74LS76AP
Bauteilbeschribung  Dual J-K Flip-Flops (with Preset and Clear)
PDF  7 Pages
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Hersteller  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

HD74LS76AP Datenblatt(HTML) 2 Page - Renesas Technology Corp

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HD74LS76A
Rev.3.00, Jul.22.2005, page 2 of 6
Function Table
Inputs
Outputs
Preset
Clear
Clock
J
K
Q
Q
L
H
X
X
X
H
L
H
L
X
X
X
L
H
L
L
X
X
X
H*
H*
H
H
L
L
Q0
Q0
H
H
H
L
H
L
H
H
L
H
L
H
H
H
H
H
Toggle
H
H
H
X
X
Q0
Q0
H; high level, L; low level, X; irrelevant,
↓; transition from high to low level,
Q0; level of Q before the indicated steady-state input conditions were established.
Q0; complement of Q0 or level of Q before the indicated steady-state input conditions were established.
Toggle; each output changes to the complement of its previous level on each active transition indicated by
↓.
* This configuration is nonstable; that is, it will not persist when preset and clear inputs return to their inactive (high) level.
Block Diagram (1/2)
Clock
J
K
Q
Q
Clear
Preset
Absolute Maximum Ratings
Item
Symbol
Ratings
Unit
Supply voltage
VCC
7
V
Input voltage
VIN
7
V
Power dissipation
PT
400
mW
Storage temperature
Tstg
–65 to +150
°C
Note: Voltage value, unless otherwise noted, are with respect to network ground terminal.
Recommended Operating Conditions
Item
Symbol
Min
Typ
Max
Unit
Supply voltage
VCC
4.75
5.00
5.25
V
IOH
–400
µA
Output current
IOL
8
mA
Operating temperature
Topr
–20
25
75
°C
Clock frequency
fclock
0
30
MHz
Clock High
tw
20
Pulse width
Clear Preset Low
tw
25
ns
“H” Data
tsu
20↓
Setup time
“L” Data
tsu
20↓
ns
Hold time
th
0↓
ns



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