M62367GP

REJ03D0877-0300 Rev.3.00 Mar 25, 2008

Page 2 of 7

Pin Arrangement

16

GND

DI

CLK

LD

Do

(VrefL)

(VrefU)

15

14

13

12

11

10

7

6

5

9

8

4

3

2

1

M62367GP

(Top view)

Outline: PLSP0016JA-A (16P2E-A)

Pin Description

Pin No.

Pin Name

Function

14

DI

Serial data input terminal to input 12-bit length serial data

11

Terminal to output MSB data of 12-bit shift register

13

CLK

Shift clock input terminal. Input signal at DI pin is input to 12-bit shift register at rise of shift

clock pulse

12

LD

When H-level signal is input to this terminal. The value stored in 12-bit shift register is

loaded in decoder and D/A converter output register.

15

2

3

4

5

6

7

10

8-bit D/A converter output terminal

9

Power supply terminal

16

GND

GND terminal

8

D/A converter upper reference voltage input terminal

1

D/A converter lower reference voltage input terminal