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VV6501 Datenblatt(PDF) 20 Page - STMicroelectronics

Teilenummer VV6501
Bauteilbeschribung  DUAL-MODE DIGITAL CAMERA CO-PROCESSOR
PDF  44 Pages
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Hersteller  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

VV6501 Datenblatt(HTML) 20 Page - STMicroelectronics

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STV0681 Hardware Interfaces
STV0681
20/44
ADCS 7283313C
4.2.3
SDRAM refresh period
The SDRAM refresh period from STV0681 is guaranteed to be inferior or equal to 15.6
µs during
‘Snapshot’/self-timer/continuous/tethered video modes of operation (that is not standby mode). In
standby mode, the SDRAM is set to self-refresh, therefore no refresh from STV0681 takes place.
4.2.4
SDRAM initialisation period
The SDRAM initialisation period is currently set to 981
µs in STV0681.
Figure 5: SDRAM Write Timing (16Mbit device, burst write)
Table 3: Timing parameters for SDRAM read/write
Symbol
Min.
Max
Units
Symbol
Min.
Max
Units
tCK
166.45
166.89
ns
tDS
81.01
ns
tCH
½tCK
tDH
83.41
ns
tCL
½tCK
tRCD
1tCK
tAC
½tCK
tRAS
55
tCK
tOH
0ns
tRC
7tCK
tCMS
82.88
ns
tRP
2tCK
tCMH
82.85
ns
tRCD
1tCK
tAS
82.88
ns
tAH
82.76
ns
DCLK
Command
DQM
A0-9,BA
A10
ACTIVE
WRITE
NOP
PRECHARGE
NOP
ROW
COLUMN
ROW
DIN M
DIN M + 1
DIN M + 2
DIN M + 3
DQ
tCK
tRCD
tRC
CKE
tRAS
tRP
tCMS
tCMH
tAS
tAH
tL
tH
tCMS
tCMH
tDS
tDH



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