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M35060 Datenblatt(PDF) 10 Page - Renesas Technology Corp

Teilenummer M35060
Bauteilbeschribung  SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
PDF  42 Pages
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Hersteller  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

M35060 Datenblatt(HTML) 10 Page - Renesas Technology Corp

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SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
M35060-XXXSP
MITSUBISHI MICROCOMPUTERS
(4) Address 2AB16
DSP0 00
DSP0 01
DSP0 02
DSP0 03
DSP0 04
DSP0 05
DSP0 06
DSP0 07
DSP0 08
DSP0 09
DSP0 10
DSP0 11
DSP0 12
DSP0 13
DSP0 14
DSP0 15
DSP0 16
PHASE 0
PHASE 1
PHASE 2
TEST25
TEST26
—
—
0
1
2
3
4
5
6
7
8
9
A
B
C
D
E
F
10
11
12
13
14
15
16
17
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Status
DA
Register
Contents
Function
Remarks
Set to line 0 of display RAM
Set to line 1 of display RAM
Set to line 2 of display RAM
Set to line 3 of display RAM
Set to line 4 of display RAM
Set to line 5 of display RAM
Set to line 6 of display RAM
Set to line 7 of display RAM
Set to line 8 of display RAM
Set to line 9 of display RAM
Set to line 10 of display RAM
Set to line 11 of display RAM
Set to line 12 of display RAM
Set to line 13 of display RAM
Set to line 14 of display RAM
Set to line 15 of display RAM
Set to line 16 of display RAM
Set by combination of DSP0XX (address 2AB16 and DSP1XX)
and DSP1XX (address 2AC16).
At internal synchronous mode (EX = 1), display monitor signal
area is all blanking signal (BLNK output) area.
Note: For halftone display, it is necessary to input the external
composite video signal to the CVIN terminal, and externally con-
nect a 100 to 200 resistor in series.
However, the halftone display is possible only with superim-
posed displays.
0
Character
Matrix-outline
1
Border
Halftone
(Note)
0
1
DSP0XX
DSP1XX
Raster color setting.
Refer Fig 3, 4 about phase angle.
SELCOR=0
Black
Red
Green
Yellow
Blue
Magenta
Cyan
White
SELCOR=1
Black
Red–2
Green–2
Yellow
Gray
Yellow–2
Cyan
White
Color
0
1
0
1
0
1
0
1
0
0
1
1
0
0
1
1
PHASE
0
PHASE
1
PHASE
2
0
0
0
0
1
1
1
1
Test mode (Must be cleared to 0.)
Must be cleared to 0.



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