Datenblatt-Suchmaschine für elektronische Bauteile
  German  ▼
ALLDATASHEETDE.COM

X  

HD64F2149YV Datenblatt(PDF) 346 Page - Renesas Technology Corp

Teilenummer HD64F2149YV
Bauteilbeschribung  Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2100 Series
PDF  1075 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Hersteller  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

HD64F2149YV Datenblatt(HTML) 346 Page - Renesas Technology Corp

Back Button HD64F2149YV Datasheet HTML 342Page - Renesas Technology Corp HD64F2149YV Datasheet HTML 343Page - Renesas Technology Corp HD64F2149YV Datasheet HTML 344Page - Renesas Technology Corp HD64F2149YV Datasheet HTML 345Page - Renesas Technology Corp HD64F2149YV Datasheet HTML 346Page - Renesas Technology Corp HD64F2149YV Datasheet HTML 347Page - Renesas Technology Corp HD64F2149YV Datasheet HTML 348Page - Renesas Technology Corp HD64F2149YV Datasheet HTML 349Page - Renesas Technology Corp HD64F2149YV Datasheet HTML 350Page - Renesas Technology Corp Next Button
Zoom Inzoom in Zoom Outzoom out
 346 / 1075 page
background image
Section 11 16-Bit Free-Running Timer
Rev. 3.00 Jan 18, 2006 page 318 of 1044
REJ09B0280-0300
Bit 2—Output Compare Interrupt B Enable (OCIBE): Selects whether to request output
compare interrupt B (OCIB) when output compare flag B (OCFB) in TCSR is set to 1.
Bit 2
OCIBE
Description
0
Output compare interrupt request B (OCIB) is disabled
(Initial value)
1
Output compare interrupt request B (OCIB) is enabled
Bit 1—Timer Overflow Interrupt Enable (OVIE): Selects whether to request a free-running
timer overflow interrupt (FOVI) when the timer overflow flag (OVF) in TCSR is set to 1.
Bit 1
OVIE
Description
0
Timer overflow interrupt request (FOVI) is disabled
(Initial value)
1
Timer overflow interrupt request (FOVI) is enabled
Bit 0—Reserved: This bit cannot be modified and is always read as 1.
11.2.7
Timer Control/Status Register (TCSR)
Bit
Initial value
Read/Write
7
ICFA
0
R/(W)*
6
ICFB
0
R/(W)*
5
ICFC
0
4
ICFD
0
3
OCFA
0
0
CCLRA
0
R/W
2
OCFB
0
R/(W)*
1
OVF
0
R/(W)*
R/(W)*
R/(W)*
R/(W)*
Note: * Only 0 can be written in bits 7 to 1 to clear these flags.
TCSR is an 8-bit register used for counter clear selection and control of interrupt request signals.
TCSR is initialized to H'00 by a reset and in hardware standby mode.
Timing is described in section 11.3, Operation.
Bit 7—Input Capture Flag A (ICFA): This status flag indicates that the FRC value has been
transferred to ICRA by means of an input capture signal. When BUFEA = 1, ICFA indicates that
the old ICRA value has been moved into ICRC and the new FRC value has been transferred to
ICRA.
ICFA must be cleared by software. It is set by hardware, however, and cannot be set by software.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


Datenblatt Download

Go To PDF Page


Link URL



War ALLDATASHEET hilfreich?  [ DONATE ] 

Über Alldatasheet   |   Werbung   |   Kontakt   |   Privatsphäre und Datenschutz   |   Link zum Datenblatt    |   Linktausch   |   Hersteller
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com