H8SXSLASH1663 datasheet(461/1158 Pages) RENESAS

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Section 8 Data Transfer Controller (DTC)

Rev.1.00 Jun. 07, 2006 Page 409 of 1102

REJ09B0294-0100

8.5

Operation

The DTC stores transfer information in the data area. When activated, the DTC reads transfer

information that is stored in the data area and transfers data on the basis of that transfer

information. After the data transfer, it writes updated transfer information back to the data area.

Since transfer information is in the data area, it is possible to transfer data over any required

number of channels. There are three transfer modes: normal, repeat, and block.

The DTC specifies the source address and destination address in SAR and DAR, respectively.

After a transfer, SAR and DAR are incremented, decremented, or fixed independently.

Table 8.2 shows the DTC transfer modes.

Table 8.2

DTC Transfer Modes

Transfer

Mode

Size of Data Transferred at

One Transfer Request

Memory Address Increment or

Decrement

Transfer

Count

Normal

1 byte/word/longword

Incremented/decremented by 1, 2, or 4,

or fixed

1 to 65536

Repeat*

1 byte/word/longword

Incremented/decremented by 1, 2, or 4,

or fixed

1 to 256*

Block*

Block size specified by CRAH (1

to 256 bytes/words/longwords)

Incremented/decremented by 1, 2, or 4,

or fixed

1 to 65536

Notes: 1. Either source or destination is specified to repeat area.

2. Either source or destination is specified to block area.

3. After transfer of the specified transfer count, initial state is recovered to continue the

operation.

Setting the CHNE bit in MRB to 1 makes it possible to perform a number of transfers with a

single activation (chain transfer). Setting the CHNS bit in MRB to 1 can also be made to have

chain transfer performed only when the transfer counter value is 0.

Figure 8.4 shows a flowchart of DTC operation, and table 8.3 summarizes the chain transfer

conditions (combinations for performing the second and third transfers are omitted).

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