H8SXSLASH1663 datasheet(489/1158 Pages) RENESAS

Teilenummer	H8SX/1663

Bauteilbeschribung	Renesas 32-Bit CISC Microcomputer H8SX Family / H8SX/1600 Series

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Section 9 I/O Ports

Rev.1.00 Jun. 07, 2006 Page 437 of 1102

REJ09B0294-0100

9.1.1

Data Direction Register (PnDDR) (n = 1, 2, 3, 6, A to F, H, I, and M)

DDR is an 8-bit write-only register that specifies the port input or output for each bit. A read from

the DDR is invalid and DDR is always read as an undefined value.

When the general I/O port function is selected, the corresponding pin functions as an output port

by setting the corresponding DDR bit to 1; the corresponding pin functions as an input port by

clearing the corresponding DDR bit to 0.

The initial DDR values are shown in table 9.3.

Bit

Bit Name

Initial Value

R/W

Note:

The lower six bits are valid and the upper two bits are reserved for port 6 registers.

The lower five bits are valid and the upper three bits are reserved for port M registers.

Bits 2 and 3 are valid and the other bits are reserved for port C registers.

Pn7DDR

Pn6DDR

Pn5DDR

Pn4DDR

Pn3DDR

Pn2DDR

Pn1DDR

Pn0DDR

Table 9.3

Startup Mode and Initial Value

Startup Mode

Port

External Extended Mode

Single-Chip Mode

Port A

H'80

H'00

Other ports

H'00

H8SX/1663 Datenblatt(PDF) 489 Page - Renesas Technology Corp