H8SXSLASH1663 datasheet(512/1158 Pages) RENESAS

Teilenummer	H8SX/1663

Bauteilbeschribung	Renesas 32-Bit CISC Microcomputer H8SX Family / H8SX/1600 Series

PDF	1158 Pages

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Hersteller	RENESAS [Renesas Technology Corp]

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512 / 1158 page

Section 9 I/O Ports

Rev.1.00 Jun. 07, 2006 Page 460 of 1102

REJ09B0294-0100

(5) PA3/

LLWR/LLB

The pin function is switched as shown below according to the combination of operating mode,

EXPE bit, bus controller register, and the PA3DDR bit settings.

Setting

Bus Controller

I/O Port

Module Name

Pin Function

LLB_OE*2

LLWR_OE*2

PA3DDR

LLB output*1



Bus controller

LLWR output*1

(initial setting E)



PA3 output

I/O port

PA3 input

(initial setting S)

[Legend]

Initial setting E:

Initial setting in external extended mode

Initial setting S:

Initial setting in single-chip mode

Notes: 1. Valid in external extended mode (EXPE = 1)

2. If the byte control SRAM space is accessed, this pin functions as the

LLB output;

otherwise, the

LLWR.

(6) PA2/

BREQ/WAIT

The pin function is switched as shown below according to the combination of the bus controller

Setting

Bus Controller

I/O Port

Module Name

Pin Function

BCR_BRLE

BCR_WAITE

PA2DDR

BREQ input



Bus controller

WAIT input



PA2 output

I/O port

PA2 input

(initial setting)

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