H8SXSLASH1663 datasheet(676/1158 Pages) RENESAS

Teilenummer	H8SX/1663

Bauteilbeschribung	Renesas 32-Bit CISC Microcomputer H8SX Family / H8SX/1600 Series

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Section 12 8-Bit Timers (TMR)

Rev.1.00 Jun. 07, 2006 Page 624 of 1102

REJ09B0294-0100

TCNT

H'FF

Counter clear

TCORA

TCORB

H'00

TMO

Figure 12.5 Example of Pulse Output

12.4.2

Reset Input

Figure 12.6 shows an example of the 8-bit timer being used to generate a pulse which is output

after a desired delay time from a TMRI input. The control bits are set as follows:

1. Set both bits CCLR1 and CCLR0 in TCR to 1 and set the TMRIS bit in TCCR to 1 so that

TCNT is cleared at the high level input of the TMRI signal.

2. In TCSR, set bits OS3 to OS0 to B'0110, causing the output to change to 1 at a TCORA

compare match and to 0 at a TCORB compare match.

With these settings, the 8-bit timer provides pulses output at a desired delay time from a TMRI

input determined by TCORA and with a pulse width determined by TCORB and TCORA.

TCNT

TCORB

TCORA

H'00

TMRI

TMO

Figure 12.6 Example of Reset Input

H8SX/1663 Datenblatt(PDF) 676 Page - Renesas Technology Corp