H8SXSLASH1663R datasheet(359/1504 Pages) RENESAS

359 / 1504 page

Section 9 Bus Controller (BSC)

Rev. 2.00 Sep. 24, 2008 Page 327 of 1468

REJ09B0412-0200

9.11.13

Refresh Control

This LSI includes a DRAM refresh control function. The refresh method is the auto-refresh. Self-

refresh cycles can be performed in software standby mode.

The refresh control function is enabled when area 2 is specified as the SDRAM space by the

DRAME and DTYPE bits in DRAMCR.

(1)

Auto-Refresh Mode

Set the RFSHE bit in REFCR to 1 to select auto-refreshing.

An auto-refresh cycle is performed when the value set in RTCOR matches the RTCNT value

(compare match). RTCNT is an up-counter operated on the input clock specified bits RTCK2 to

RTCK0 in REFCR. RTCNT is initialized upon the compare match and restarts to count up with

H'00. Accordingly, an auto-refresh cycle is repeated at intervals specified by bits RTCK2 to

RTCK0 in RTCOR. Set the bits so that the required refresh intervals of the DRAM must be

satisfied.

Since setting bits RTCK2 to RTCK0 starts RTCNT to count up, set RTCNT and RTCOR before

setting bits RTCK2 to RTCK0. When changing RTCNT and RTCOR, the count operation should

be halted. When changing bits RTCK2 to RTCK0, change them only after disabling the external

access and external bus release by the EXDMAC, if the write data buffer function is in use,

disabling the write data buffer function and reading the external space.

The external space cannot be accessed during auto-refresh.

Figure 9.76 shows auto-refresh cycle timing.

The operation of refresh counter is same as that for the DRAM interface. For details, see section

9.10.12, Refresh Control.

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