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H8SX/1663R Datenblatt(PDF) 494 Page - Renesas Technology Corp

Teilenummer H8SX/1663R
Bauteilbeschribung  Renesas 32-Bit CISC Microcomputer H8SX Family / H8SX/1600 Series
PDF  1504 Pages
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Hersteller  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

H8SX/1663R Datenblatt(HTML) 494 Page - Renesas Technology Corp

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Section 11 EXDMA Controller (EXDMAC)
Rev. 2.00 Sep. 24, 2008 Page 462 of 1468
REJ09B0412-0200
11.3.4
EXDMA Transfer Count Register (EDTCR)
EDTCR is a 32-bit readable/writable register that specifies the size of data to be transferred (total
transfer size).
When EDTCR is set to H'00000001, the total transfer size is 1 byte. When EDTCR is set to
H'00000000, the total transfer size is not specified and the transfer counter is halted (free-running
mode). In this case, no transfer end interrupt by the transfer counter is generated. When EDTCR is
set to H'FFFFFFFF, up to 4 Gbytes (4,294,967,295 bytes) of the total transfer size is set. When the
EXDMA is active, EDTCR indicates the remaining transfer size. The value according to the data
access size (byte:
−1, word: −2, longword: −4) is decremented each time of a data transfer.
EDTCR can be read at all times by the CPU. When reading EDTCR for a channel on which
EXDMA transfer processing is in progress, a longword-size read must be executed. Do not write
to EDTCR for a channel on which EXDMA transfer is in progress.
31
0
R/W
30
0
R/W
29
0
R/W
28
0
R/W
27
0
R/W
24
0
R/W
26
0
R/W
25
0
R/W
Bit
Bit Name
Initial Value
R/W
23
0
R/W
22
0
R/W
21
0
R/W
20
0
R/W
19
0
R/W
16
0
R/W
18
0
R/W
17
0
R/W
Bit
Bit Name
Initial Value
R/W
15
0
R/W
14
0
R/W
13
0
R/W
12
0
R/W
11
0
R/W
8
0
R/W
10
0
R/W
9
0
R/W
Bit
Bit Name
Initial Value
R/W
7
0
R/W
6
0
R/W
5
0
R/W
4
0
R/W
3
0
R/W
0
0
R/W
2
0
R/W
1
0
R/W
Bit
Bit Name
Initial Value
R/W



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