H8SXSLASH1663R datasheet(756/1504 Pages) RENESAS

756 / 1504 page

Section 14 16-Bit Timer Pulse Unit (TPU)

Rev. 2.00 Sep. 24, 2008 Page 724 of 1468

REJ09B0412-0200

Bit

Bit Name

Initial

value

R/W

Description

TCFD

Count Direction Flag

Status flag that shows the direction in which TCNT counts in

channels 1, 2, 4, and 5.

In channels 0 and 3, bit 7 is reserved. It is always read as 1

and cannot be modified.

0: TCNT counts down

1: TCNT counts up



Reserved

This bit is always read as 1 and cannot be modified.

TCFU

R/(W)* Underflow Flag

Status flag that indicates that a TCNT underflow has occurred

when channels 1, 2, 4, and 5 are set to phase counting mode.

In channels 0 and 3, bit 5 is reserved. It is always read as 0

and cannot be modified.

[Setting condition]

When the TCNT value underflows (changes from H'0000 to

H'FFFF)

[Clearing condition]

When a 0 is written to TCFU after reading TCFU = 1

(When the CPU is used to clear this flag by writing 0 while the

corresponding interrupt is enabled, be sure to read the flag

after writing 0 to it.)

TCFV

R/(W)* Overflow Flag

Status flag that indicates that a TCNT overflow has occurred.

[Setting condition]

When the TCNT value overflows (changes from H'FFFF to

H'0000)

[Clearing condition]

When a 0 is written to TCFV after reading TCFV = 1

(When the CPU is used to clear this flag by writing 0 while the

corresponding interrupt is enabled, be sure to read the flag

after writing 0 to it.)

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