H8SXSLASH1663R datasheet(792/1504 Pages) RENESAS

Teilenummer	H8SX/1663R

Bauteilbeschribung	Renesas 32-Bit CISC Microcomputer H8SX Family / H8SX/1600 Series

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Section 14 16-Bit Timer Pulse Unit (TPU)

Rev. 2.00 Sep. 24, 2008 Page 760 of 1468

REJ09B0412-0200

(2)

Output Compare Output Timing

A compare match signal is generated in the final state in which TCNT and TGR match (the point

at which the count value matched by TCNT is updated). When a compare match signal is

generated, the output value set in TIOR is output at the output compare output pin (TIOC pin).

After a match between TCNT and TGR, the compare match signal is not generated until the

TCNT input clock is generated.

Figure 14.33 shows output compare output timing.

TCNT input

clock

TCNT

+ 1

Compare match

signal

TIOC pin

TGR

Figure 14.33 Output Compare Output Timing

(3)

Input Capture Signal Timing

Figure 14.34 shows input capture signal timing.

TCNT

+ 1

TGR

Input capture

input

Input capture

signal

+ 2

Figure 14.34 Input Capture Input Signal Timing

H8SX/1663R Datenblatt(PDF) 792 Page - Renesas Technology Corp