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H8SX/1663R Datenblatt(PDF) 818 Page - Renesas Technology Corp

Teilenummer H8SX/1663R
Bauteilbeschribung  Renesas 32-Bit CISC Microcomputer H8SX Family / H8SX/1600 Series
PDF  1504 Pages
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Hersteller  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

H8SX/1663R Datenblatt(HTML) 818 Page - Renesas Technology Corp

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Section 15 Programmable Pulse Generator (PPG)
Rev. 2.00 Sep. 24, 2008 Page 786 of 1468
REJ09B0412-0200
• PODRL_1
Bit
Bit Name
Initial
Value
R/W
Description
7
6
5
4
3
2
1
0
POD23
POD22
POD21
POD20
POD19
POD18
POD17
POD16
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Output Data Register 23 to 16
For bits which have been set to pulse output by
NDERL_1, the output trigger transfers NDRL_1 values to
this register during PPG operation. While NDERL_1 is set
to 1, the CPU cannot write to this register. While
NDERL_1 is cleared, the initial output value of the pulse
can be set.
15.3.3
Next Data Registers H, L (NDRH, NDRL)
NDRH and NDRL store the next data for pulse output. The NDR addresses differ depending on
whether pulse output groups have the same output trigger or different output triggers.
• NDRH
Bit
Bit Name
Initial Value
R/W
7
NDR15
0
R/W
6
NDR14
0
R/W
5
NDR13
0
R/W
4
NDR12
0
R/W
3
NDR11
0
R/W
2
NDR10
0
R/W
1
NDR9
0
R/W
0
NDR8
0
R/W
• NDRL
Bit
Bit Name
Initial Value
R/W
7
NDR7
0
R/W
6
NDR6
0
R/W
5
NDR5
0
R/W
4
NDR4
0
R/W
3
NDR3
0
R/W
2
NDR2
0
R/W
1
NDR1
0
R/W
0
NDR0
0
R/W



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