H8SXSLASH1663R datasheet(298/1504 Pages) RENESAS

Teilenummer	H8SX/1663R

Bauteilbeschribung	Renesas 32-Bit CISC Microcomputer H8SX Family / H8SX/1600 Series

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Section 9 Bus Controller (BSC)

Rev. 2.00 Sep. 24, 2008 Page 266 of 1468

REJ09B0412-0200

9.8.3

I/O Pins Used for Burst ROM Interface

Table 9.17 shows the pins used for the burst ROM interface.

Table 9.17

I/O Pins Used for Burst ROM Interface

Name

Symbol

I/O

Function

Bus cycle start

Output

Signal indicating that the bus cycle has

started.

Address strobe

Output

Strobe signal indicating that an address output on

the address bus is valid during access

Read strobe

Output

Strobe signal indicating the read access

Read/write

RD/

Output

Signal indicating the data bus input or output

direction

Low-high write

LHWR

Output

Strobe signal indicating that the upper byte (D15 to

D8) is valid during write access

Low-low write

LLWR

Output

Strobe signal indicating that the lower byte (D7 to

D0) is valid during write access

Chip select 0 and 1

CS0, CS1

Output

Strobe signal indicating that the area is selected

Wait

WAIT

Input

Wait request signal used when an external address

space is accessed

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