SH7708 datasheet(34/633 Pages) RENESAS

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Table 2.1

Initial Register Values

Type

Registers

Initial Value

General registers

R0 to R15

Undefined

Control registers

MD bit = 1, RB bit = 1, BL bit = 1, I3–

I0 = 1111 (H'F), reserved bits = 0,

others undefined

GBR, SSR, SPC

Undefined

VBR

H'00000000

System registers

MACH, MACL, PR

Undefined

H'A0000000

Note:

Initialized by a power-on reset or manual reset.

2.1.2

General Registers

There are 16 general registers, designated R0 to R15 (figure 2.3). General registers R0 to R7 are

banked registers, with a different R0–R7 register bank (R0_BANK0–R7_BANK0 or

R0_BANK1–R7_BANK1) being accessed according to the processor mode. For details, see

section 2.1.1, Privileged Mode and Banks.

R0*1, *2

General Registers

Notes:

R0 functions as an index register in the indexed

GBR-indirect addressing mode. In some instructions,

only R0 can be used as the source register or

destination register.

R0–R7 are banked registers.

In privileged mode, SR.RB specifies which banked

registers are accessed as general registers

(R0_BANK0–R7_BANK0 or R0_BANK1–R7_BANK1).

R1*2

R2*2

R3*2

R4*2

R5*2

R6*2

R7*2

R10

R11

R12

R13

R14

R15

Figure 2.3 General Registers

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