Datenblatt-Suchmaschine für elektronische Bauteile
  German  ▼
ALLDATASHEETDE.COM

X  

74FCT16652CTPVCG4 Datenblatt(PDF) 7 Page - Texas Instruments

Teilenummer 74FCT16652CTPVCG4
Bauteilbeschribung  16-Bit Registered Transceivers
PDF  16 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Hersteller  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

74FCT16652CTPVCG4 Datenblatt(HTML) 7 Page - Texas Instruments

Back Button 74FCT16652CTPVCG4 Datasheet HTML 3Page - Texas Instruments 74FCT16652CTPVCG4 Datasheet HTML 4Page - Texas Instruments 74FCT16652CTPVCG4 Datasheet HTML 5Page - Texas Instruments 74FCT16652CTPVCG4 Datasheet HTML 6Page - Texas Instruments 74FCT16652CTPVCG4 Datasheet HTML 7Page - Texas Instruments 74FCT16652CTPVCG4 Datasheet HTML 8Page - Texas Instruments 74FCT16652CTPVCG4 Datasheet HTML 9Page - Texas Instruments 74FCT16652CTPVCG4 Datasheet HTML 10Page - Texas Instruments 74FCT16652CTPVCG4 Datasheet HTML 11Page - Texas Instruments Next Button
Zoom Inzoom in Zoom Outzoom out
 7 / 16 page
background image
CY74FCT16652T
CY74FCT162652T
7
Switching Characteristics Over the Operating Range[17]
Parameter
Description
CY74FCT16652AT
CY74FCT162652AT
Unit
Min.
Max.
Fig. No.[18]
tPLH
tPHL
Propagation Delay Bus to Bus
1.5
6.3
ns
1, 3
tPZH
tPHL
Output Enable Time OEAB or OEBA to Bus
1.5
9.8
ns
1, 7, 8
tPHZ
tPLZ
Output Disable Time OEAB or OEBA to Bus
1.5
6.3
ns
1, 7, 8
tPLH
tPHL
Propagation Delay Clock to Bus
1.5
6.3
ns
1, 5
tPLH
tPHL
Propagation Delay SBA or SAB to Bus
1.5
7.7
ns
1, 5
tSU
Set-Up time HIGH or LOW Bus to Clock
2.0
ns
4
tH
Hold Time HIGH or LOW Bus to Clock
1.5
ns
4
tW
Clock Pulse Width HIGH or LOW
5.0
ns
5
tSK(O)
Output Skew[19]
0.5
ns
Parameter
Description
CY74FCT16652CT
CY74FCT162652CT
Unit
Min.
Max.
Fig. No.[18]
tPLH
tPHL
Propagation Delay
Bus to Bus
1.5
5.4
ns
1, 3
tPZH
tPHL
Output Enable Time
OEAB or OEBA to Bus
1.5
7.8
ns
1, 7, 8
tPHZ
tPLZ
Output Disable Time
OEAB or OEBA to Bus
1.5
6.3
ns
1, 7, 8
tPLH
tPHL
Propagation Delay
Clock to Bus
1.5
5.7
ns
1, 5
tPLH
tPHL
Propagation Delay
SBA or SAB to Bus
1.5
6.2
ns
1, 5
tSU
Set-Up Time
HIGH or LOW
Bus to Clock
2.0
ns
4
tH
Hold Time
HIGH or LOW
Bus to Clock
1.5
ns
4
tW
Clock Pulse Width
HIGH or LOW
5.0
ns
5
tSK(O)
Output Skew[19]
0.5
ns
Notes:
17. Minimum limits are specified, but not tested, on propagation delays.
18. See “Parameter Measurement Information” in the General Information section.
19. Skew between any two outputs of the same package switching in the same direction. This parameter ensured by design.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16


Datenblatt Download

Go To PDF Page


Link URL



War ALLDATASHEET hilfreich?  [ DONATE ] 

Über Alldatasheet   |   Werbung   |   Kontakt   |   Privatsphäre und Datenschutz   |   Link zum Datenblatt    |   Linktausch   |   Hersteller
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com