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TLV1544CD Datenblatt(PDF) 22 Page - Texas Instruments |
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TLV1544CD Datenblatt(HTML) 22 Page - Texas Instruments |
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22 / 41 page ![]() TLV1544C, TLV1544I, TLV1548C, TLV1548I, TLV1548M LOW-VOLTAGE 10-BIT ANALOG-TO-DIGITAL CONVERTERS WITH SERIAL CONTROL AND 4/8 ANALOG INPUTS SLAS139C – DECEMBER 1996 – REVISED JANUARY 1999 22 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 PARAMETER MEASUREMENT INFORMATION NOTE A: To minimize errors caused by noise at CS, the internal circuitry waits for a setup time after CS ↓ before responding to control input signals. No attempt should be made to clock in input data until the minimum CS setup time elapses. I/O CLK DI DO EOC CS (see Note A) FS 1 2 3 45 6 7 8 9 10 Sample MSB MSB LSB D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Hi-Z Hi-Z A3 A2 A1 A0 Address Sampled Conversion Starts on 10th I/O CLK ↓ (6 I/O CLKs) Access 11 12 13 14 15 16 Hold/Conversion CS Rise After 16th I/O CLK ↓ Initialize Counter 0s td(EOC ↑-CS↓) Initialize State Machine 7 I/O CLKs Maximum Figure 19. DSP Interface Timing (16-Clock Transfer, Normal Sample Mode, INV CLK = Low) |
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