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TDA7561

Acknowledge

The transmitter* puts a resistive HIGH level on the SDA line during the acknowledge clock pulse (see fig. 21).

The receiver** the acknowledges has to pull-down (LOW) the SDA line during the acknowledge clock pulse, so

that the SDAline is stable LOW during this clock pulse.

* Transmitter

= master (

µP) when it writes an address to the TDA7561

= slave (TDA7561) when the

µP reads a data byte from TDA7561

** Receiver

= slave (TDA7561) when the

µP writes an address to the TDA7561

= master (

µP) when it reads a data byte from TDA7561

SDA

SCL

DATA LINE

STABLE, DATA

VALID

CHANGE

DATA

ALLOWED

D99AU1031

SCL

SDA

START

STOP

D99AU1032

SCL

1

MSB

23789

SDA

START

ACKNOWLEDGMENT

FROM RECEIVER

D99AU1033