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TS68230FN Datenblatt(PDF) 56 Page - STMicroelectronics

Teilenummer TS68230FN
Bauteilbeschribung  HMOS PARALLEL INTERFACE/TIMER
PDF  61 Pages
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Hersteller  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

TS68230FN Datenblatt(HTML) 56 Page - STMicroelectronics

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6.6. AC ELECTRICAL SPECIFICATIONS
(VCC = 5.0Vdc ± 5%, VSS = 0Vdc, TA =TL to TH unless otherwise noted)
Iack Timings (figure 6.6)
8MHz
10MHz
Number
Parameter
Min.
Max.
Min.
Max.
Unit
8CS or PIACK or TIACK High to Data Out Invalid (hold time)
0
0
ns
9CS or PIACK or TIACK High to D0-D7 High Impedance
50
45
ns
10
CS or PIACK or TIACK High to DTACK High
50
45
ns
11
CS or PIACK or TIACK High to DTACK High Impedance
100
55
ns
29
CLK Low to Data Output Valid, Interrupt Acknowledge Cycle
120
100
ns
31
PIACK or TIACK Low to CLK Low (setup time)
50
40
ns
34
CLK Low to DTACK Low Interrupt Acknowledge Cycle (delay time)
100
100
ns
Figure 6.6 : IACK Timing Diagram.
Notes : 1. This specification assures recognition of the asserted edge of H1(H3).
TS68230
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