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LTC1096/LTC1096L

LTC1098/LTC1098L

10968fc

Input Data Word

The LTC1096(L) requires no DIN word. It is permanently

conﬁgured to have a single differential input. The conver-

sion result, in which output on the DOUT line is MSB-ﬁrst

sequence, followed by LSB sequence providing easy

interface to MSB- or LSB-ﬁrst serial ports.

The LTC1098(L) clocks data into the DIN input on the ris-

ing edge of the clock. The input data words are deﬁned

as follows:

Start Bit

The ﬁrst “logical one” clocked into the DIN input after CS

goes low is the start bit. The start bit initiates the data

transfer. The LTC1098(L) will ignore all leading zeros which

precede this logical one. After the start bit is received,

the remaining bits of the input word will be clocked in.

Further inputs on the DIN pin are then ignored until the

next CS cycle.

APPLICATIONS INFORMATION

CLK

tCYC

POWER

DOWN

tsuCS

tWAKEUP

DIN

SGL/

DIFF

MSBF

B0*

NULL

BIT

Hi-Z

DOUT

tCONV

tSMPL

HI-Z

START

ODD/

SIGN

DON'T CARE

MSB-FIRST DATA (MSBF = 0)

MSB-FIRST DATA (MSBF = 1)

10968 F02

CLK

tCYC

POWER

DOWN

tsuCS

tWAKEUP

DIN

SGL/

DIFF

MSBF

NULL

BIT

Hi-Z

DOUT

tCONV

tSMPL

HI-Z

START

ODD/

SIGN

DON'T CARE

B7*

*AFTER COMPLETING THE DATA TRANSFER, IF FURTHER CLOCKS ARE APPLIED WITH CS LOW, THE ADC WILL OUTPUT ZEROS INDEFINITELY.

(MSB)

Figure 2. LTC1098(L) Operating Sequence Example: Differential Inputs (CH+, CH–)

SGL/

DIFF

ODD/

SIGN

MSBF

START

MUX

ADDRESS

MSB-FIRST/

LSB-FIRST

10968 AI02

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