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LTC4309IGN-PBF Datenblatt(PDF) 3 Page - Linear Technology

Teilenummer LTC4309IGN-PBF
Bauteilbeschribung  Level Shifting Low Offset Hot Swappable 2-Wire Bus Buffer with Stuck Bus Recovery
PDF  16 Pages
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Hersteller  LINER [Linear Technology]
Direct Link  http://www.linear.com
Logo LINER - Linear Technology

LTC4309IGN-PBF Datenblatt(HTML) 3 Page - Linear Technology

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LTC4309
3
4309fa
The
l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VCC = 3.3V, VCC2 = 3.3V, unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN TYP MAX UNITS
VCC
Positive Supply Voltage
l
2.3
5.5
V
VCC2
Input Side Accelerator Supply Voltage
l
1.8
5.5
V
ICC
VCC Input Supply Current Enabled
VCC = VCC2 = 5.5V, VSDAIN = VSCLIN = 0V (Note 2)
l
711
mA
ISD
VCC Input Supply Current Disabled
VCC = VCC2 = 5.5V, SDA = SCL = 5.5V, ENABLE = OV
l
900 1400
μA
ICC2
VCC2 Input Supply Current Enabled
VCC = VCC2 = 5.5V, VSDAIN = VSCLIN = 0V (Note 2)
l
190
250
μA
ISD2
VCC2 Input Supply Current Disabled
VCC = VCC2 = 5.5V, SDA = SCL = 5.5V, ENABLE = OV
l
140
180
μA
Propagation Delay and Rise Time Accelerators
tPHL
SDA/SCL Propagation Delay High to Low
CLOAD = 50pF, 2.7k to VCC on SDA, SCL, (Note 3, 4), (Figure 1)
85
ns
tPLH
SDA/SCL Propagation Delay Low to High
CLOAD = 50pF, 2.7k to VCC on SDA, SCL, (Note 3, 4), (Figure 1)
10
ns
tRISE
SDA/SCL Rise Time
CLOAD = 100pF, 10k to VCC on SDA, SCL, VCC = 5V VCC2 = 5V,
(Note 3, 5), (Figure 1)
30
300
ns
tFALL
SDA/SCL Fall Time
CLOAD = 100pF, 10k to VCC on SDA, SCL, VCC = 5V (Note 3, 5),
(Figure 1)
30
300
ns
IPULLUPAC
Transient Boosted Pull-up Current
Positive Transition > 0.8V/μS on SDA, SCL, VCC = 3.3V (Note 7)
5
8
mA
Start-Up Circuitry
VPRE
Precharge Voltage
SDA, SCL Open
l
0.8
1.0
1.2
V
tIDLE
Bus Idle Time
l
55
95
175
μs
VTHR_EN
ENABLE Threshold Voltage
ENABLE Rising Edge
l
0.8
1.4
2
V
VTHR_EN(HYST) ENABLE Threshold Voltage Hysteresis
(Note 3)
100
mV
VTHR_CTRL
ACC, DISCEN Threshold Voltage
0.5
0.7
1
V
ICTRL
ENABLE, ACC, DISCEN Input Currents
ENABLE, ACC, DISCEN from 0 to VCC
l
0.1
±5
μA
tPLH_EN
ENABLE Delay Off-On
(Figure 1)
95
μs
tPHL_EN
ENABLE Delay On-Off
(Note 3), (Figure 1)
10
ns
tPLH_READY
READY Delay On-Off
(Note 3), (Figure 1)
10
ns
tPHL_READY
READY Delay Off-On
(Note 3), (Figure 1)
10
ns
VOL_READY
READY Output Low Voltage
IREADY = 3mA, VCC = 2.3V
l
0.4
V
IOFF_READY
READY Off Leakage Current
VCC = READY = 5.5V
l
0.1
±5
μA
Timing Characteristics
fI2C, MAX
I2C Maximum Operating Frequency
(Note 3)
400
600
kHz
tBUF
Bus Free Time Between Stop and Start
Condition
(Note 3)
1.3
μs
tHD, STA
Hold Time After (Repeated)
Start Condition
(Note 3)
100
ns
tSU, STA
Repeated Start Condition Set-Up Time
(Note 3)
0
ns
tSU, STO
Stop Condition Set-Up Time
(Note 3)
0
ns
tHD, DATI
Data Hold Time Input
(Note 3)
0
ns
tSU, DAT
Data Set-Up Time
(Note 3)
100
ns
Input-Output Connection
VOS
Input-Output Offset Voltage
2.7k to VCC2 on SDA, SCL, Driven SDA, SCL = 0.2V
l
20
60
100
mV
VTHR
SDA, SCL Logic Input Threshold Voltage
VCC ≥ 2.9V
VCC < 2.9V
1.4
1.1
1.65
1.35
1.9
1.6
V
V
ELECTRICAL CHARACTERISTICS



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