LTC6912IGN-2 datasheet(12/24 Pages) LINER

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LTC6912

6912fa

Note 1: Absolute Maximum Ratings are those values beyond which the life

of the device may be impaired.

Note 2: The LTC6912-1C and LTC6912-1I are guaranteed functional over

the operating temperature range of –40

°C to 85°C. The LTC6912-1H is

guaranteed functional over the operating temperature range of –40

°C to

125

°C.

Note 3: The LTC6912-1C is guaranteed to meet specified performance

from 0

°C to 70°C. The LTC6912-1C is designed, characterized and

expected to meet specified performance from – 40

°C to 85°C but is not

tested or QA sampled at these temperatures. The LTC6912-1I is

guaranteed to meet specified performance from –40

°C to 85°C. The

LTC6912-1H is guaranteed to meet specified performance from –40

°C to

125

°C.

Note 4: Output voltage swings are measured as differences between the

output and the respective supply rail.

Note 5: Extended operation with output shorted may cause junction

temperature to exceed the 150

°C limit for GN package and 125°C for a

DFN package is not recommended.

Note 6: Gain is measured with a large signal DC test using an output

excursion between approximately 30% and 70% of supply voltage.

Note 7: Channel-to-channel isolation is measured by applying a 200kHz

input signal to one channel so that its output varies 1VRMS, and measuring

the output voltage RMS of the other channel relative to AGND with its

input tied to AGND. Isolation is calculated:

IsolationB = 20 • log

10(VOUTA/VOUTB) or

IsolationA = 20 • log10(VOUTB/VOUTA)

High channel-to-channel isolation is strongly dependent on proper circuit

layout. See Applications Information.

Note 8: Offset voltage referred to the INA or INB input is (1 + 1/|GAIN|)

times the offset voltage of the internal op amp, where GAIN is the nominal

gain magnitude. The typical offset voltage values are for 25

°C only. See

Applications Information.

Note 9: Input resistance can vary by approximately

±30% part-to-part at a

given gain setting.

Note 10: Guaranteed by design, not subject to test.

Note 11: States 13, 14 and 15 (binary 11xx) are not used. Programming a

channel to states 8 or higher will configure that particular channel into a

low power shutdown state. In addition, programming a channel into

state 15 (binary 1111) will cause that particular channel to draw up to

20mA of supply current and is not recommended.

SERIAL I TERFACE SPECIFICATIO S

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

Serial Interface Timing, Dual

±4.5V ~ ±5.5V Supplies (Note 10)

DIN Valid to CLK Setup

●

DIN Valid to CLK Hold

●

0ns

CLK High

●

CLK Low

●

CS/LD Pulse Width

●

LSB CLK to CS/LD

●

CS/LD Low to CLK

●

DOUT Output Delay

CL = 15pF

●

CLK Low to CS/LD Low

●

0ns

D31

D7 • • • D4

D31

D7 • • • D4

6912 TD

PREVIOUS BYTE

CURRENT BYTE

CLK

DIN

CS/LD

DOUT

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