KH231AI datasheet(5/6 Pages) CADEKA

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KH231

DATA SHEET

REV. 1A January 2004

ca = 65°C/W for the KH231 without heat sink in still air.

30°C/W for the KH231 with a Wakefield 215 heat

sink in still air.

10°C/W for the KH231 with a Wakefield 215 heat

sink at 300 ft/min air.

30°C/W for the KH231 with a Thermalloy 2240A

heat sink in still air.

5°C/W for the KH231 with a Thermalloy 2240A

heat sink at 500 ft/min air.

For example, with the KH231 operating at ±15V while

driving a 100

Ω load at 15V

pp output (50% duty cycle

pulse waveform, DC = 0), P(npn) = P(pnp) = 190mW (Rcol

= 33) and P(cir) = 0.48W.

Then with the Wakefield

215 heat sink and air flow of 300 ft/min the output

transistors’ Tj is 28°C above ambient and worst case Tj in

the rest of the circuit is 32°C above ambient. In still air,

however, the rise in Tj is 45°C and 49°C, respectively.

With no heat sink, the rise in Tj is 75°C and 79°C,

respectively! Under most conditions, HEAT SINKING IS

REQUIRED.

Other methods of heat sinking may be used, but for

best results, make contact with the base of the KH231

package, use a large thermal capacity heat sink and use

forced air convection.

Low VCC Operation: Supply Current Adjustment

The KH231 is designed to operate on supplies as low as

±5V. In order to improve full bandwidth at reduced sup-

ply voltages, the supply current (ICC) must be increased.

The plot of Bandwidth vs. VCC, shows the effect of short-

ing pins 1 and 2 and pins 8 and 9; this will increase both

bandwidth and supply current. Care should be taken to

not exceed the maximum junction temperatures; for this

reason this technique should not be used with supplies

exceeding ±10V.

For intermediate values of VCC,

external resistors between pins 1 and 2 and pins 8 and 9

can be used.

Offset Voltage Adjustment

If trimming of the input offset voltage (Vos = Vni -Vin) is

desired, a resistor value of 10k

Ω to 1MΩ placed between

pins 8 and 9 will cause Vos to become more negative by

8mV to 0.2mV respectively. Similarly, a resistor placed

between pins 1 and 2 will cause Vos, to become more

positive.

Thermal Considerations

At high ambient temperatures or large internal power

dissipations, heat sinking is required to maintain

acceptable junction temperatures. Use the thermal

model on the previous page to determine junction

temperatures. Many styles of heat sinks are available for

TO-8 packages; the Thermalloy 2240 and 2268 are good

examples. Some heat sinks are the radial fin type which

cover the pc board and may interfere with external

components. An excellent solution to this problem is to

use surface mounted resistors and capacitors.

They

have a very low profile and actually improve high

frequency performance. For use of these heat sinks with

conventional components, a 0.1” high spacer can be inserted

under the TO-8 package to allow sufficient clearance.

P(circuit) = (ICC)((+VCC) – (VCC)) where ICC = 16mA at ±15V

P(xxx) = [(±VCC) – Vout – (Icol) (Rcol + 4)] (Icol) (%Duty)

For positive Vo and VCC, this is the power in the npn

device. For negative Vo and VCC, this is the power in the

pnp device.

Icol = Vo/RL or 4mA, whichever is greater. (Include feed-

back R in RL.)

Rcol is a resistor (33Ω recommended) between the xxx

collector and ±VCC.

The limiting factor for output current and voltage is junction

temperature. Of secondary importance is I(out), which

should not exceed 150mA.

Tj(pnp) = P(pnp) (100 + θca) + (P(cir) + P(npn))(θca) + Ta,

similar for Tj(npn).

Tj(cir) = P(cir)(48 + θca) + (P(pnp) + P(npn))(θca) + Ta.

Tambient

θca

Tcase

17.5

°C/W

Tj(circuit)

Pcircuit

100

°C/W

Tj(npn)

Pnpn

100

°C/W

Ppnp

Tj(pnp)

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