SN54LVTH574, SN74LVTH574

3.3-V ABT OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS

WITH 3-STATE OUTPUTS

SCBS688D – MAY 1997 – REVISED APRIL 1999

5

POST OFFICE BOX 655303

timing requirements over recommended operating free-air temperature range (unless otherwise

noted) (see Figure 1)

SN54LVTH574

SN74LVTH574

VCC = 3.3 V

± 0.3 V

VCC = 2.7 V

VCC = 3.3 V

± 0.3 V

VCC = 2.7 V

UNIT

MIN

MAX

MIN

MAX

MIN

MAX

MIN

MAX

fclock

Clock frequency

150

150

150

150

MHz

tw

Pulse duration, CLK high or low

3.3

3.3

3.3

3.3

ns

tsu

Setup time, data before CLK

↑

2

2.4

2

2.4

ns

th

Hold time, data after CLK

↑

0.9

0.9

0.3

0

ns

noted) (see Figure 1)

SN54LVTH574

SN74LVTH574

PARAMETER

FROM

(INPUT)

TO

(OUTPUT)

VCC = 3.3 V

± 0.3 V

VCC = 2.7 V

VCC = 3.3 V

± 0.3 V

VCC = 2.7 V

UNIT

MIN

MAX

MIN

MAX

MIN

TYP†

MAX

MIN

MAX

fmax

150

150

150

150

MHz

tPLH

CLK

Q

1.7

4.9

5.9

1.8

3

4.5

5.3

ns

tPHL

CLK

Q

1.7

4.9

5.5

1.8

3

4.5

5.3

ns

tPZH

OE

Q

1.4

5.1

6.5

1.5

3.2

4.8

5.9

ns

tPZL

OE

Q

1.4

5.1

6.1

1.5

3.5

4.8

5.9

ns

tPHZ

OE

Q

1

5.9

6.4

2

3.5

4.8

5.1

ns

tPLZ

OE

Q

0.8

4.8

5.3

2

3.2

4.4

4.4

ns

† All typical values are at VCC = 3.3 V, TA = 25°C.